The present invention relates generally to data signaling devices, and more particularly, to low voltage differential signaling devices and methods that include gain compensation and bias control for stable operation over a wide range of common mode input voltages.
Low voltage differential signaling (LVDS) applications have become common, particularly with the popularity of CMOS technology. Certain industry standards for LVDS are specified by ANSI/TIA/EIA-644 and IEEE 1596.4.
An example LVDS application is shown in FIG. 1. As shown in FIG. 1, two circuits 102 and 104 (on the same circuit board or integrated chip, or on separate such components) communicate with each other over a pair of conductors 110 using LVDS signaling. In such an example, an LVDS driver 106 sends a differential signal to be received by LVDS receiver 108 by driving opposite polarity (i.e. complementary) signals on each conductor, both polarity signals having the same common-mode voltage. LVDS requires the combined differential voltage on conductors 110 to be no more than 600 mV. Although the common-mode voltage may vary due to noise and temperature conditions, for example, preferably the common-mode voltage is about 1.2V. However, LVDS requires receivers to be able to understand signals that range between 0V and 2.4V.
As illustrated in FIG. 2, signals 202 and 204 that are received by an LVDS receiver may technically be in compliance with LVDS. (It should be understood that the signal on only one conductor is shown and that there will actually be a pair of complementary signals having opposite polarity on the conductors at the same common mode voltage). Signal 202 has a high common mode voltage Vcm(high) such that it ranges at or just below the upper LVDS range of 2.4V, while signal 204 has a low common mode voltage Vcm(low) such that it ranges at or just above the lower LVDS range of 0V. Although both signals 202, 204 are in technical compliance with LVDS standards, they pose problems for conventional LVDS receivers. For example, if receiver 108 is biased for signals having a common-mode voltage of 1.2V, it may operate poorly or not at all when the signals are close to the extreme low and high values of 0V and 2.4V, thereby preventing data signals between circuits 102 and 104 from being properly communicated.
The present invention relates to differential data signaling devices and methods. In accordance with one aspect of the invention, a differential signaling receiver includes a gain compensation and control circuit having a low common mode compensation circuit and a high common mode compensation circuit. A control circuit is coupled to both compensation circuits and senses the operation of one to control the operation of the other. The operation of the compensation circuits ensures that differential signals having a wide range of common mode input voltages are accurately detected by the receiver. The control circuit serves to keep the combined operation of the compensation circuits stable over the wide range of common mode input voltages.